Niomite Cyclone II™ EP2C8 Controller/FPGA Module

Information :

The Niomite module allows implementation of FPGA logic functions and/or Altera® Nios II processor operation in the smallest possible form factor. Niomite provides the following circuits to support a small footprint FPGA based controller:

  • 512K X 8 SRAM
  • EP1S4 FPGA serial loader (FPGA and Nios II boot)

Niomite modules also supports the specification (master or slave half card, 60 pin), and can interface with other modules designed to that specification. The Niomite kit includes an FPGA programmer and power supply, and provides all the hardware items which are necessary to start designing with and evaluating the powerful features of Altera® Cyclone II FPGA devices.

Module Details :

  1. Altera EP2C8 Cyclone II FPGA, in –C8 speed grade and 144 pin TQFP package.
  2. Separate programming ports (ASMI flash interface and JTAG interface).
  3. Reset and voltage monitor IC which provides 400mS reset pulse.
  4. Reset push-button switch.
  5. 44 input/output and 7 input pins available.
  6. 1 discrete indicator LED (green).
  7. Clock oscillator (25 MHz).
  8. compatible design.
  9. EPCS4 (4Mbit) serial flash for FPGA configuration (and Nios II software).
  10. 512K x 8 bit (4Mbit) SRAM for Nios II program execution and dynamic data storage.

 

Quartus II Starter Design :

  1. Created using Quartus II ver. 6.0 SP1.
  2. Nios II processor defined.
  3. All module pins are defined in top level schematic project file.
  4. Memory test with results indicated to LED.
  5. FPGA load from EPCS4.

Kit Package Contents :

  1. Niomite Cyclone II EP2C8 module..
  2. Wall mount 3.3VDC/2A switching supply.
  3. Altera USB Blaster FPGA programmer.
Note:The starter design available for download from this website was created using Quartus II ver. 6.0 SP1. User modification of the starter design may be required to support compilation under later versions of Quartus II. Quartus II “web edition” is available for download from the Altera website. This starter design is provided “as is”. Modification or support of this Nios II starter design is not included in the purchase price.

Images :

Product Data :

FPGA EP2C8
Logic Elements (apprx. 50 gates per LE) 8256
M4K RAM Blocks (4 Kbits + parity) 36
Total RAM Bits 165888
PLLs 2

 

EP3C25 module

CMC2001-2M-8 EP2C8 module 139.00 US
CMC2001-2M-8-KU EP2C8 USB Blaster kit 369.00